Home
last modified time | relevance | path

Searched refs:PLLD_CLKENABLE (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h449 #define PLLD_CLKENABLE 30 macro
/u-boot/arch/arm/mach-tegra/tegra114/
A Dclock.c711 data |= (1 << PLLD_CLKENABLE) | (1 << pllinfo->lock_ena); in clock_early_init()
/u-boot/arch/arm/mach-tegra/tegra124/
A Dclock.c891 data |= (1 << PLLD_CLKENABLE) | (1 << pllinfo->lock_ena); in clock_early_init()

Completed in 8 milliseconds