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Searched refs:PLLP_OUT1_RATIO (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-tegra/
A Dclk_rst.h267 #define PLLP_OUT1_RATIO 8 macro
/u-boot/arch/arm/mach-tegra/
A Dclock.c801 | (IN_408_OUT_9_6_DIVISOR << PLLP_OUT1_RATIO) in tegra30_set_up_pllp()
/u-boot/arch/arm/mach-tegra/tegra210/
A Dclock.c951 reg = (IN_408_OUT_9_6_DIVISOR << PLLP_OUT1_RATIO) in tegra210_setup_pllp()

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