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Searched refs:PLL_GPLL (Results 1 – 22 of 22) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Drk3036-cru.h13 #define PLL_GPLL 3 macro
A Drk3128-cru.h12 #define PLL_GPLL 3 macro
A Drk3228-cru.h13 #define PLL_GPLL 4 macro
A Drk3188-cru-common.h14 #define PLL_GPLL 4 macro
A Drk3368-cru.h23 #define PLL_GPLL 5 macro
A Drv1108-cru.h13 #define PLL_GPLL 2 macro
A Drk3288-cru.h11 #define PLL_GPLL 4 macro
A Drk3328-cru.h14 #define PLL_GPLL 4 macro
A Dpx30-cru.h180 #define PLL_GPLL 1 macro
A Drk3399-cru.h14 #define PLL_GPLL 5 macro
/u-boot/drivers/clk/rockchip/
A Dclk_rk322x.c398 case PLL_GPLL: in rk322x_clk_set_rate()
A Dclk_rk3368.c467 case PLL_GPLL: in rk3368_clk_get_rate()
A Dclk_px30.c1559 case PLL_GPLL: in px30_pmuclk_get_rate()
1579 case PLL_GPLL: in px30_pmuclk_set_rate()
A Dclk_rk3288.c881 case PLL_GPLL: in rk3288_clk_set_rate()
/u-boot/arch/arm/dts/
A Drk3036.dtsi106 assigned-clocks = <&cru PLL_GPLL>;
A Drk3128.dtsi253 assigned-clocks = <&cru PLL_GPLL>;
A Drk322x.dtsi326 assigned-clocks = <&cru PLL_GPLL>;
A Drk3399-gru.dtsi347 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
A Drk3328.dtsi790 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
797 <&cru PLL_GPLL>, <&xin24m>,
A Drk3288.dtsi610 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
A Dpx30.dtsi787 clocks = <&xin24m>, <&pmucru PLL_GPLL>;
A Drk3399.dtsi1356 <&cru PLL_GPLL>, <&cru PLL_CPLL>,

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