Searched refs:PLL_POSTDIV1_SHIFT (Results 1 – 12 of 12) sorted by relevance
/u-boot/arch/arm/include/asm/arch-rockchip/ |
A D | cru_rk3036.h | 68 PLL_POSTDIV1_SHIFT = 12, enumerator 69 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT,
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A D | cru_rk3128.h | 75 PLL_POSTDIV1_SHIFT = 12, enumerator 76 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT,
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A D | cru_rk322x.h | 70 PLL_POSTDIV1_SHIFT = 12, enumerator 71 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT,
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A D | cru_px30.h | 119 PLL_POSTDIV1_SHIFT = 12, enumerator 120 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT,
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/u-boot/arch/arm/include/asm/arch-rk3308/ |
A D | cru_rk3308.h | 96 PLL_POSTDIV1_SHIFT = 12, enumerator 97 PLL_POSTDIV1_MASK = 7 << PLL_POSTDIV1_SHIFT,
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/u-boot/drivers/clk/rockchip/ |
A D | clk_rk3036.c | 71 (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv); in rkclk_set_pll() 203 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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A D | clk_rk3328.c | 55 PLL_POSTDIV1_SHIFT = 12, enumerator 56 PLL_POSTDIV1_MASK = 0x7 << PLL_POSTDIV1_SHIFT, 270 (div->postdiv1 << PLL_POSTDIV1_SHIFT)); in rkclk_set_pll()
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A D | clk_rk322x.c | 70 (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv); in rkclk_set_pll() 205 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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A D | clk_rk3128.c | 65 (div->postdiv1 << PLL_POSTDIV1_SHIFT) | div->fbdiv); in rkclk_set_pll() 270 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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A D | clk_rk3399.c | 84 PLL_POSTDIV1_SHIFT = 8, enumerator 85 PLL_POSTDIV1_MASK = 0x7 << PLL_POSTDIV1_SHIFT, 356 (div->postdiv1 << PLL_POSTDIV1_SHIFT) | in rkclk_set_pll()
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A D | clk_px30.c | 243 (rate->postdiv1 << PLL_POSTDIV1_SHIFT) | rate->fbdiv); in rkclk_set_pll() 277 postdiv1 = (con & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rkclk_pll_get_rate()
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/u-boot/arch/arm/mach-rockchip/rk3036/ |
A D | sdram_rk3036.c | 341 (dpll_init_cfg.postdiv1 << PLL_POSTDIV1_SHIFT) | in rkdclk_init()
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