Searched refs:PLL_POSTDIV2_MASK (Results 1 – 12 of 12) sorted by relevance
| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | cru_rk3036.h | 80 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| A D | cru_rk3128.h | 89 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| A D | cru_rk322x.h | 84 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| A D | cru_px30.h | 134 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3036.c | 72 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
206 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk322x.c | 71 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
208 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk3128.c | 66 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
273 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| A D | clk_rk3328.c | 67 PLL_POSTDIV2_MASK = 0x7 << PLL_POSTDIV2_SHIFT, enumerator
272 PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
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| A D | clk_rk3399.c | 83 PLL_POSTDIV2_MASK = 0x7 << PLL_POSTDIV2_SHIFT, enumerator
353 PLL_POSTDIV2_MASK | PLL_POSTDIV1_MASK | in rkclk_set_pll()
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| A D | clk_px30.c | 244 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkclk_set_pll()
280 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
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| /u-boot/arch/arm/include/asm/arch-rk3308/ |
| A D | cru_rk3308.h | 111 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT, enumerator
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| /u-boot/arch/arm/mach-rockchip/rk3036/ |
| A D | sdram_rk3036.c | 343 rk_clrsetreg(&pll->con1, PLL_POSTDIV2_MASK | PLL_REFDIV_MASK, in rkdclk_init()
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