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Searched refs:PLL_POSTDIV2_SHIFT (Results 1 – 12 of 12) sorted by relevance

/u-boot/arch/arm/include/asm/arch-rockchip/
A Dcru_rk3036.h79 PLL_POSTDIV2_SHIFT = 6, enumerator
80 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT,
A Dcru_rk3128.h88 PLL_POSTDIV2_SHIFT = 6, enumerator
89 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT,
A Dcru_rk322x.h83 PLL_POSTDIV2_SHIFT = 6, enumerator
84 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT,
A Dcru_px30.h133 PLL_POSTDIV2_SHIFT = 6, enumerator
134 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT,
/u-boot/arch/arm/include/asm/arch-rk3308/
A Dcru_rk3308.h110 PLL_POSTDIV2_SHIFT = 6, enumerator
111 PLL_POSTDIV2_MASK = 7 << PLL_POSTDIV2_SHIFT,
/u-boot/drivers/clk/rockchip/
A Dclk_rk3036.c73 (div->postdiv2 << PLL_POSTDIV2_SHIFT | in rkclk_set_pll()
206 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
A Dclk_rk3328.c66 PLL_POSTDIV2_SHIFT = 6, enumerator
67 PLL_POSTDIV2_MASK = 0x7 << PLL_POSTDIV2_SHIFT,
273 (div->postdiv2 << PLL_POSTDIV2_SHIFT) | in rkclk_set_pll()
A Dclk_rk322x.c72 (div->postdiv2 << PLL_POSTDIV2_SHIFT | in rkclk_set_pll()
208 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
A Dclk_rk3128.c67 (div->postdiv2 << PLL_POSTDIV2_SHIFT | in rkclk_set_pll()
273 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
A Dclk_rk3399.c82 PLL_POSTDIV2_SHIFT = 12, enumerator
83 PLL_POSTDIV2_MASK = 0x7 << PLL_POSTDIV2_SHIFT,
355 (div->postdiv2 << PLL_POSTDIV2_SHIFT) | in rkclk_set_pll()
A Dclk_px30.c245 (rate->postdiv2 << PLL_POSTDIV2_SHIFT | in rkclk_set_pll()
280 postdiv2 = (con & PLL_POSTDIV2_MASK) >> PLL_POSTDIV2_SHIFT; in rkclk_pll_get_rate()
/u-boot/arch/arm/mach-rockchip/rk3036/
A Dsdram_rk3036.c344 (dpll_init_cfg.postdiv2 << PLL_POSTDIV2_SHIFT | in rkdclk_init()

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