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Searched refs:PPLL_DIV_SEL_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/video/
A Dati_radeon_fb.c223 mode->clk_cntl_index & PPLL_DIV_SEL_MASK, in radeon_write_pll_regs()
224 ~PPLL_DIV_SEL_MASK); in radeon_write_pll_regs()
243 mode->clk_cntl_index & PPLL_DIV_SEL_MASK, in radeon_write_pll_regs()
244 ~PPLL_DIV_SEL_MASK); in radeon_write_pll_regs()
/u-boot/include/
A Dradeon.h985 #define PPLL_DIV_SEL_MASK 0x00000300 macro

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