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Searched refs:PPLL_POST3_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/video/
A Dati_radeon_fb.c218 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { in radeon_write_pll_regs()
267 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
/u-boot/include/
A Dradeon.h991 #define PPLL_POST3_DIV_MASK 0x00070000 macro

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