Searched refs:PPLL_POST3_DIV_MASK (Results 1 – 2 of 2) sorted by relevance
218 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { in radeon_write_pll_regs()267 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); in radeon_write_pll_regs()
991 #define PPLL_POST3_DIV_MASK 0x00070000 macro
Completed in 14 milliseconds