PTR4_TDINIT2 (reference) in projects: u-boot

Searched refs:PTR4_TDINIT2 (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-sunxi/dram_timings/
A D	ddr3_1333.c	`83 writel(PTR4_TDINIT2(tdinit2) \| PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()`
A D	lpddr3_stock.c	`79 writel(PTR4_TDINIT2(tdinit2) \| PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()`
A D	ddr2_v3s.c	`80 writel(PTR4_TDINIT2(tdinit2) \| PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()`
/u-boot/arch/arm/include/asm/arch-sunxi/
A D	dram_sunxi_dw.h	`152 #define PTR4_TDINIT2(x) ((x) << 0) macro`

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