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Searched refs:PULLUDEN (Results 1 – 23 of 23) sorted by relevance

/u-boot/board/BuR/brsmarc1/
A Dmux.c21 {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
23 {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
25 {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
37 {OFFSET(mcasp0_fsx), MODE(3) | PULLUDEN | RXACTIVE},
39 {OFFSET(mcasp0_axr0), MODE(3) | PULLUDEN | RXACTIVE},
121 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
129 {OFFSET(mii1_rxclk), (MODE(1) | PULLUDEN)},
134 {OFFSET(mmc0_dat0), (MODE(3) | PULLUDEN)},
136 {OFFSET(mmc0_cmd), (MODE(2) | PULLUDEN)},
143 {OFFSET(mii1_txd2), (MODE(3) | PULLUDEN)},
[all …]
/u-boot/board/BuR/brppt1/
A Dmux.c20 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)},
24 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
37 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
133 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
135 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
136 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
145 {OFFSET(mmc0_dat3), (MODE(3) | PULLUDEN | RXACTIVE)},
147 {OFFSET(mmc0_dat2), (MODE(3) | PULLUDEN | RXACTIVE)},
149 {OFFSET(mmc0_dat1), (MODE(7) | PULLUDEN | RXACTIVE)},
[all …]
/u-boot/board/eets/pdu001/
A Dmux.c20 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
26 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
32 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
38 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
44 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
50 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
56 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
58 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
/u-boot/board/phytec/phycore_am335x_r2/
A Dmux.c18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
37 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
39 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
47 PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
48 {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */
50 PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */
87 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
88 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
89 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
90 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
[all …]
/u-boot/board/tcl/sl50/
A Dmux.c18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
30 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
36 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
42 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
48 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
78 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
80 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
86 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
88 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
/u-boot/board/compulab/cm_t335/
A Dmux.c18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
26 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)},
83 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
84 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
85 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
86 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
87 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
97 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN)}, /* GPIO2_0 */
/u-boot/board/ti/am335x/
A Dmux.c27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
51 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
57 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
113 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
115 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
121 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
123 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
130 PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
[all …]
/u-boot/board/vscom/baltos/
A Dmux.c26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
42 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
44 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
90 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
91 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
92 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
93 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
94 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
A Dboard.c333 {OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN )}, /* GPIO3_4 */
/u-boot/board/BuR/brxre1/
A Dmux.c20 {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
22 {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
24 {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
26 {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
28 {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
34 {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
42 {OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN},
90 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
92 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
98 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
[all …]
/u-boot/board/siemens/pxm2/
A Dmux.c24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
41 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
42 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
43 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
44 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
45 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
47 {OFFSET(mcasp0_ahclkx), MODE(7) | PULLUDEN}, /* MCASP0_AHCLKX */
53 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
54 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
59 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL)},
[all …]
/u-boot/arch/arm/mach-omap2/am33xx/
A Dchilisom.c31 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
33 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
48 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
49 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
50 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
51 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
52 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
/u-boot/board/isee/igep003x/
A Dmux.c24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
50 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
51 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
52 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
53 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
54 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
/u-boot/board/bosch/shc/
A Dmux.c22 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */
24 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */
32 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */
44 {OFFSET(mcasp0_aclkx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_SCLK */
45 {OFFSET(mcasp0_fsx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D0 */
46 {OFFSET(mcasp0_axr0), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D1 */
47 {OFFSET(mcasp0_ahclkr), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_CS0 */
119 {OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN)},
/u-boot/board/siemens/draco/
A Dmux.c23 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
29 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
35 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
37 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
52 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
53 {OFFSET(gpmc_csn1), MODE(0) | PULLUDEN | PULLUP_EN}, /* NAND_CS1 */
54 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
55 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
56 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
57 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
[all …]
/u-boot/board/bosch/guardian/
A Dmux.c19 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
24 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
25 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
/u-boot/board/compulab/cm_t43/
A Dmux.c107 {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | PULLUDEN)},
108 {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)},
109 {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | PULLUDEN)},
110 {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)},
/u-boot/board/ti/ti816x/
A Devm.c67 { OFFSET(pincntl158), PULLDOWN_EN | PULLUDEN | MODE(0x0) },
/u-boot/board/grinn/chiliboard/
A Dboard.c36 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
/u-boot/arch/arm/include/asm/arch-am33xx/
A Dmux_am43xx.h21 #define PULLUDEN (0x0 << 16) /* Pull up/down enable */ macro
A Dmux_am33xx.h29 #define PULLUDEN (0x0 << 3) /* Pull up enabled */ macro
A Dmux_ti814x.h22 #define PULLUDEN (0x0 << 16) /* Pull up enabled */ macro
A Dmux_ti816x.h27 #define PULLUDEN (0x0 << 3) /* Pull up enabled */ macro

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