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Searched refs:PULLUP_EN (Results 1 – 25 of 25) sorted by relevance

/u-boot/board/isee/igep003x/
A Dmux.c23 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
29 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
33 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
34 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
35 {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
40 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
41 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
42 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
43 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
44 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
[all …]
/u-boot/board/phytec/phycore_am335x_r2/
A Dmux.c17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
24 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
25 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
26 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
28 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
29 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
30 {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
47 PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
50 PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */
64 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
[all …]
/u-boot/board/vscom/baltos/
A Dmux.c25 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
31 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
32 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
33 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
34 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
35 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
36 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
56 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
57 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
74 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
[all …]
/u-boot/board/tcl/sl50/
A Dmux.c17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
29 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
35 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
47 {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
53 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
57 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
58 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
60 {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
71 {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
[all …]
/u-boot/board/BuR/brppt1/
A Dmux.c22 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
24 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
31 {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
33 {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
35 {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
70 {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
72 {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
74 {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN)},
95 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
113 {OFFSET(gpmc_wait0), (MODE(1) | RXACTIVE | PULLUP_EN)},
[all …]
/u-boot/board/compulab/cm_t335/
A Dmux.c17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
25 {OFFSET(uart1_ctsn), (MODE(0) | PULLUP_EN | RXACTIVE)},
31 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},
32 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},
33 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},
34 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},
35 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},
36 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},
67 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
[all …]
/u-boot/board/compulab/cm_t43/
A Dmux.c39 {OFFSET(gpmc_a11), MODE(2) | RXACTIVE | PULLUP_EN}, /* rxd0 */
44 {OFFSET(mdio_data), (MODE(0) | PULLUP_EN | RXACTIVE)},
45 {OFFSET(mdio_clk), (MODE(0) | PULLUP_EN)},
57 {OFFSET(mmc0_cmd), (MODE(0) | PULLUP_EN | RXACTIVE)},
58 {OFFSET(mmc0_dat0), (MODE(0) | PULLUP_EN | RXACTIVE)},
59 {OFFSET(mmc0_dat1), (MODE(0) | PULLUP_EN | RXACTIVE)},
60 {OFFSET(mmc0_dat2), (MODE(0) | PULLUP_EN | RXACTIVE)},
61 {OFFSET(mmc0_dat3), (MODE(0) | PULLUP_EN | RXACTIVE)},
82 {OFFSET(gpmc_wait0), (MODE(0) | PULLUP_EN | RXACTIVE)},
83 {OFFSET(gpmc_wpn), (MODE(0) | PULLUP_EN)},
[all …]
/u-boot/board/siemens/rut/
A Dmux.c34 {OFFSET(ddr_wen), (MODE(0) | PULLUP_EN)},
35 {OFFSET(ddr_ba0), (MODE(0) | PULLUP_EN)},
38 {OFFSET(ddr_a0), (MODE(0) | PULLUP_EN)},
39 {OFFSET(ddr_a1), (MODE(0) | PULLUP_EN)},
40 {OFFSET(ddr_a2), (MODE(0) | PULLUP_EN)},
41 {OFFSET(ddr_a3), (MODE(0) | PULLUP_EN)},
42 {OFFSET(ddr_a4), (MODE(0) | PULLUP_EN)},
43 {OFFSET(ddr_a5), (MODE(0) | PULLUP_EN)},
44 {OFFSET(ddr_a6), (MODE(0) | PULLUP_EN)},
45 {OFFSET(ddr_a7), (MODE(0) | PULLUP_EN)},
[all …]
/u-boot/board/ti/am335x/
A Dmux.c26 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
32 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
44 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
69 {OFFSET(spi0_cs1), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* GPIO0_6 */
130 PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */
133 PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */
161 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
180 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
185 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
219 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* nWP */
[all …]
/u-boot/board/BuR/brsmarc1/
A Dmux.c27 {OFFSET(spi0_cs0), MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE},
29 {OFFSET(spi0_cs1), MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE},
41 {OFFSET(mcasp0_ahclkr), MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE},
49 {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
57 {OFFSET(uart0_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
73 {OFFSET(gpmc_be1n), (MODE(7) | PULLUDEN | PULLUP_EN)},
77 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN | PULLUP_EN)},
105 {OFFSET(mmc0_dat1), (MODE(7) | PULLUDEN | PULLUP_EN)},
107 {OFFSET(gpmc_wen), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
186 {OFFSET(mii1_rxd2), MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE},
[all …]
/u-boot/board/ti/am43xx/
A Dmux.c44 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
45 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
50 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
51 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)},
57 {OFFSET(mmc0_cmd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_CMD */
66 {OFFSET(i2c0_sda), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
67 {OFFSET(i2c0_scl), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)},
72 {OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)}, /* GPIO5_7 */
96 {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* Wait */
97 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* Write Protect */
[all …]
/u-boot/board/siemens/pxm2/
A Dmux.c23 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
25 {OFFSET(nnmi), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_TXD */
31 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
32 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
33 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
34 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
35 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
36 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
37 {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
79 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
[all …]
/u-boot/board/BuR/brxre1/
A Dmux.c26 {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
28 {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
34 {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN},
42 {OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN},
88 {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
90 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
120 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
121 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
126 {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
127 {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
[all …]
/u-boot/board/bosch/shc/
A Dmux.c53 {OFFSET(gpmc_wpn), (MODE(6) | PULLUP_EN)}, /* UART4_TXD */
107 {OFFSET(tms), (MODE(0) | RXACTIVE | PULLUP_EN)},
108 {OFFSET(tdi), (MODE(0) | RXACTIVE | PULLUP_EN)},
109 {OFFSET(tdo), (MODE(0) | PULLUP_EN)},
110 {OFFSET(tck), (MODE(0) | RXACTIVE | PULLUP_EN)},
112 {OFFSET(emu0), (MODE(0) | RXACTIVE | PULLUP_EN)},
113 {OFFSET(emu1), (MODE(0) | RXACTIVE | PULLUP_EN)},
114 {OFFSET(pmic_power_en), (MODE(0) | PULLUP_EN)},
115 {OFFSET(rsvd2), (MODE(0) | PULLUP_EN)},
193 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},
[all …]
/u-boot/board/grinn/chiliboard/
A Dboard.c35 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
41 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
42 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
43 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
44 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
45 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
46 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
58 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
59 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
/u-boot/arch/arm/mach-omap2/am33xx/
A Dchilisom.c38 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
39 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
40 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
41 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
42 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
43 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
44 {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
45 {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
46 {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
47 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
/u-boot/board/eets/pdu001/
A Dmux.c19 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
25 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
31 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
37 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
43 {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
49 {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
/u-boot/board/bosch/guardian/
A Dmux.c18 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
31 {OFFSET(mcasp0_aclkx), (MODE(7) | PULLUP_EN)},
32 {OFFSET(mii1_txd0), (MODE(7) | PULLUP_EN)},
62 {OFFSET(gpmc_wait0), (MODE(0) | PULLUP_EN | RXACTIVE)},
63 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)},
64 {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)},
/u-boot/board/ti/ti816x/
A Devm.c68 { OFFSET(pincntl159), PULLUP_EN | PULLUDDIS | MODE(0x0) },
69 { OFFSET(pincntl160), PULLUP_EN | PULLUDDIS | MODE(0x0) },
70 { OFFSET(pincntl161), PULLUP_EN | PULLUDDIS | MODE(0x0) },
71 { OFFSET(pincntl162), PULLUP_EN | PULLUDDIS | MODE(0x0) },
72 { OFFSET(pincntl163), PULLUP_EN | PULLUDDIS | MODE(0x0) },
/u-boot/board/siemens/draco/
A Dmux.c22 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
28 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
42 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
43 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
44 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
45 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
46 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
47 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
63 {OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)},
245 {OFFSET(mdio_data), (MODE(0) | RXACTIVE | PULLUP_EN)},
[all …]
/u-boot/arch/arm/include/asm/arch-am33xx/
A Dmux_am43xx.h20 #define PULLUP_EN (0x1 << 17) /* Pull Up Selection */ macro
A Dmux_am33xx.h28 #define PULLUP_EN (0x1 << 4) /* Pull Up Selection */ macro
A Dmux_ti814x.h21 #define PULLUP_EN (0x1 << 17) /* Pull UP Selection */ macro
A Dmux_ti816x.h26 #define PULLUP_EN (0x1 << 4) /* Pull Up Selection */ macro
/u-boot/arch/arm/include/asm/arch-pxa/
A Dpxa-regs.h1664 #define PULLUP_EN 0x4000 macro

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