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Searched refs:PW0_ENABLE (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-tegra/
A Ddc.h406 #define PW0_ENABLE BIT(0) macro
/u-boot/drivers/video/
A Dtegra.c162 val = PW0_ENABLE | PW1_ENABLE | PW2_ENABLE; in basic_init()
/u-boot/drivers/video/tegra124/
A Dsor.c776 writel(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_dc_sor_attach()

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