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Searched refs:QCA953X_DDR_REG_DDR2_CONFIG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca953x/
A Dddr.c334 writel(DDR2_CONF_VAL, regs + QCA953X_DDR_REG_DDR2_CONFIG); in ddr_init()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h281 #define QCA953X_DDR_REG_DDR2_CONFIG 0xb8 macro

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