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Searched refs:QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca953x/
A Dclk.c83 div = ((ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) in get_clocks()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h471 #define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 macro

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