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Searched refs:QCA956X_DDR_REG_CTL_CONF (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dddr.c213 writel(ctl_config, ddr_regs + QCA956X_DDR_REG_CTL_CONF); in qca956x_ddr_init()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h297 #define QCA956X_DDR_REG_CTL_CONF 0x108 macro

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