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Searched refs:QCA956X_DDR_REG_DDR2_EMR3 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dddr.c253 writel(0, ddr_regs + QCA956X_DDR_REG_DDR2_EMR3); in qca956x_ddr_init()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h292 #define QCA956X_DDR_REG_DDR2_EMR3 0xc0 macro

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