QCA956X_DDR_REG_FSM_WAIT_CTRL (reference) in projects: u-boot

Searched refs:QCA956X_DDR_REG_FSM_WAIT_CTRL (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A D	ddr.c	`225 writel(DDR_FSM_WAIT_CTRL_VAL, ddr_regs + QCA956X_DDR_REG_FSM_WAIT_CTRL); in qca956x_ddr_init()`
/u-boot/arch/mips/mach-ath79/include/mach/
A D	ar71xx_regs.h	`296 #define QCA956X_DDR_REG_FSM_WAIT_CTRL 0xe4 macro`

Completed in 10 milliseconds