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Searched refs:QCA956X_PLL_CPU_CONFIG1_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-ath79/qca956x/
A Dclk.c260 set_val(QCA956X_PLL_CPU_CONFIG1_REG, CPU_PLL_CONFIG1_NINT_MASK, \ in qca956x_pll_init()
335 pll = readl(regs + QCA956X_PLL_CPU_CONFIG1_REG); in get_clocks()
/u-boot/arch/mips/mach-ath79/include/mach/
A Dar71xx_regs.h537 #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 macro

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