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Searched refs:R8A774A1_CLK_CANFD (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dr8a774a1-cpg-mssr.h57 #define R8A774A1_CLK_CANFD 46 macro
/u-boot/drivers/clk/renesas/
A Dr8a774a1-cpg-mssr.c24 LAST_DT_CORE_CLK = R8A774A1_CLK_CANFD,
108 DEF_DIV6P1("canfd", R8A774A1_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
/u-boot/arch/arm/dts/
A Dr8a774a1.dtsi1147 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1150 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1163 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1166 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1180 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1183 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;

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