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Searched refs:R8A774B1_CLK_CANFD (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dr8a774b1-cpg-mssr.h55 #define R8A774B1_CLK_CANFD 44 macro
/u-boot/drivers/clk/renesas/
A Dr8a774b1-cpg-mssr.c23 LAST_DT_CORE_CLK = R8A774B1_CLK_CANFD,
101 DEF_DIV6P1("canfd", R8A774B1_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
/u-boot/arch/arm/dts/
A Dr8a774b1.dtsi1021 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1024 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1037 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1040 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1054 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1057 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;

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