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Searched refs:R8A774C0_CLK_CANFD (Results 1 – 3 of 3) sorted by relevance

/u-boot/include/dt-bindings/clock/
A Dr8a774c0-cpg-mssr.h59 #define R8A774C0_CLK_CANFD 48 macro
/u-boot/drivers/clk/renesas/
A Dr8a774c0-cpg-mssr.c25 LAST_DT_CORE_CLK = R8A774C0_CLK_CANFD,
118 DEF_DIV6P1("canfd", R8A774C0_CLK_CANFD, CLK_PLL0D6, 0x244),
/u-boot/arch/arm/dts/
A Dr8a774c0.dtsi975 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
978 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
991 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
994 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1008 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1011 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;

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