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Searched refs:RCB_REG (Results 1 – 13 of 13) sorted by relevance

/u-boot/arch/x86/cpu/ivybridge/
A Dlpc.c232 clrbits_le32(RCB_REG(0x3f02), 0xf); in pch_power_options()
295 writel(0, RCB_REG(0x33c8)); in cpt_pm_init()
296 setbits_le32(RCB_REG(0x21b0), 0xf); in cpt_pm_init()
340 writel(0, RCB_REG(0x33c8)); in ppt_pm_init()
341 setbits_le32(RCB_REG(0x21b0), 0xf); in ppt_pm_init()
355 setbits_le32(RCB_REG(0x2234), 0xf); in enable_clock_gating()
366 reg32 = readl(RCB_REG(CG)); in enable_clock_gating()
379 writel(reg32, RCB_REG(CG)); in enable_clock_gating()
381 setbits_le32(RCB_REG(0x38c0), 0x7); in enable_clock_gating()
383 setbits_le32(RCB_REG(0x3564), 0x3); in enable_clock_gating()
[all …]
A Dbd82x6x.c108 data = readl(RCB_REG(IOBPS)); in iobp_poll()
124 writel(address, RCB_REG(IOBPIRI)); in pch_iobp_update()
128 writel(IOBPS_RW_BX, RCB_REG(IOBPS)); in pch_iobp_update()
130 writel(IOBPS_READ_AX, RCB_REG(IOBPS)); in pch_iobp_update()
135 data = readl(RCB_REG(IOBPD)); in pch_iobp_update()
140 if ((readl(RCB_REG(IOBPS)) & 0x6) != 0) { in pch_iobp_update()
151 writel(IOBPS_RW_BX, RCB_REG(IOBPS)); in pch_iobp_update()
153 writel(IOBPS_WRITE_AX, RCB_REG(IOBPS)); in pch_iobp_update()
158 writel(data, RCB_REG(IOBPD)); in pch_iobp_update()
A Dsdram.c378 writel(NOINT << D30IP_PIP, RCB_REG(D30IP)); in rcba_config()
379 writel(INTA << D29IP_E1P, RCB_REG(D29IP)); in rcba_config()
380 writel(INTA << D28IP_P3IP, RCB_REG(D28IP)); in rcba_config()
381 writel(INTA << D27IP_ZIP, RCB_REG(D27IP)); in rcba_config()
382 writel(INTA << D26IP_E2P, RCB_REG(D26IP)); in rcba_config()
383 writel(NOINT << D25IP_LIP, RCB_REG(D25IP)); in rcba_config()
384 writel(NOINT << D22IP_MEI1IP, RCB_REG(D22IP)); in rcba_config()
387 writel(DIR_ROUTE(PIRQB, PIRQH, PIRQA, PIRQC), RCB_REG(D31IR)); in rcba_config()
396 writew(0x0100, RCB_REG(OIC)); in rcba_config()
398 (void)readw(RCB_REG(OIC)); in rcba_config()
[all …]
/u-boot/arch/x86/cpu/broadwell/
A Dpch.c54 writew(0x1000, RCB_REG(OIC)); in broadwell_pch_early_init()
56 readw(RCB_REG(OIC)); in broadwell_pch_early_init()
61 readl(RCB_REG(HPTC)); in broadwell_pch_early_init()
65 setbits_le32(RCB_REG(GCS), 1 << 5); in broadwell_pch_early_init()
214 clrbits_le32(RCB_REG(0x232c), 1), in pch_pm_init_magic()
217 writel(0x00012fff, RCB_REG(0x3314)); in pch_pm_init_magic()
219 writel(0x04000000, RCB_REG(0x3324)); in pch_pm_init_magic()
413 reg32 = readl(RCB_REG(CG)); in pch_cg_init()
432 writel(reg32, RCB_REG(CG)); in pch_cg_init()
511 setbits_le32(RCB_REG(ACPIIRQEN), in serialio_init_once()
[all …]
A Diobp.c36 u16 status = readw(RCB_REG(IOBPS)); in iobp_poll()
52 writel(address, RCB_REG(IOBPIRI)); in pch_iobp_trans_start()
65 writew(IOBPU_MAGIC, RCB_REG(IOBPU)); in pch_iobp_trans_finish()
68 setbits_le16(RCB_REG(IOBPS), IOBPS_READY); in pch_iobp_trans_finish()
74 status = readw(RCB_REG(IOBPS)); in pch_iobp_trans_finish()
91 return readl(RCB_REG(IOBPD)); in pch_iobp_read()
99 writel(data, RCB_REG(IOBPD)); in pch_iobp_write()
129 writel(addr, RCB_REG(IOBPIRI)); in pch_iobp_exec()
133 writel(*data, RCB_REG(IOBPD)); in pch_iobp_exec()
135 setbits_le16(RCB_REG(IOBPS), 1); in pch_iobp_exec()
[all …]
A Dadsp.c89 setbits_le32(RCB_REG(0x3350), 1 << 10); in broadwell_adsp_probe()
102 setbits_le32(RCB_REG(ACPIIRQEN), ADSP_ACPI_IRQEN); in broadwell_adsp_probe()
A Dsata.c113 reg32 = readl(RCB_REG(0x3a84)); in broadwell_sata_init()
120 writel(reg32, RCB_REG(0x3a84)); in broadwell_sata_init()
196 clrsetbits_le32(RCB_REG(0x333c), 0x00300000, 0x00c00000); in broadwell_sata_init()
A Dcpu_full.c285 pmsync = readl(RCB_REG(PMSYNC_CONFIG)); in configure_pch_power_sharing()
286 pmsync2 = readl(RCB_REG(PMSYNC_CONFIG2)); in configure_pch_power_sharing()
301 writel(pmsync, RCB_REG(PMSYNC_CONFIG)); in configure_pch_power_sharing()
320 writel(pmsync2, RCB_REG(PMSYNC_CONFIG2)); in configure_pch_power_sharing()
/u-boot/arch/x86/include/asm/
A Dintel_regs.h22 #define RCB_REG(reg) (RCB_BASE_ADDRESS + (reg)) macro
/u-boot/arch/x86/cpu/intel_common/
A Dcpu.c59 writel(1 << 2, RCB_REG(RC)); in cpu_common_init()
106 clrsetbits_le32(RCB_REG(SOFT_RESET_DATA), 0x3f << 6, in cpu_set_flex_ratio_to_tdp_nominal()
112 setbits_le32(RCB_REG(SOFT_RESET_CTRL), 1); in cpu_set_flex_ratio_to_tdp_nominal()
A Dlpc.c35 clrbits_le32(RCB_REG(GCS), 4); in enable_port80_on_lpc()
/u-boot/arch/x86/include/asm/arch-broadwell/
A Dspi.h17 #define SPI_REG(x) (RCB_REG(SPIBAR_OFFSET + (x)))
/u-boot/drivers/video/
A Divybridge_igd.c732 writew(0x0010, RCB_REG(DISPBDF)); in gma_func0_init()
733 setbits_le32(RCB_REG(FD2), PCH_ENABLE_DBDF); in gma_func0_init()

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