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Searched refs:RCC_CFGR_SW_PLL1 (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A Dclk_stm32h7.c39 #define RCC_CFGR_SW_PLL1 3 macro
422 clrsetbits_le32(&regs->cfgr, RCC_CFGR_SW_MASK, RCC_CFGR_SW_PLL1); in configure_clocks()
423 while ((readl(&regs->cfgr) & RCC_CFGR_SW_MASK) != RCC_CFGR_SW_PLL1) in configure_clocks()
650 case RCC_CFGR_SW_PLL1: in stm32_clk_get_rate()

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