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Searched refs:RCC_PLL1DIVR_DIVR1_MASK (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A Dclk_stm32h7.c61 #define RCC_PLL1DIVR_DIVR1_MASK GENMASK(30, 24) macro
542 divr1 = readl(&regs->pll1divr) & RCC_PLL1DIVR_DIVR1_MASK; in stm32_get_PLL1_rate()
545 fracn1 = readl(&regs->pll1fracr) & RCC_PLL1DIVR_DIVR1_MASK; in stm32_get_PLL1_rate()

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