Searched refs:RCC_PLLCKSELR_DIVM1_MASK (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A D	clk_stm32h7.c	50 #define RCC_PLLCKSELR_DIVM1_MASK GENMASK(9, 4) macro 531 divm1 = readl(&regs->pllckselr) & RCC_PLLCKSELR_DIVM1_MASK; in stm32_get_PLL1_rate()

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