Searched refs:REG_CPU_DIV_CLK_CTRL_0_ADDR (Results 1 – 2 of 2) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_dfs.c | 274 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
316 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
335 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
570 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
610 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
629 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_high_2_low()
877 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_low_2_high()
915 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_low_2_high()
934 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_low_2_high()
1289 dfs_reg_write(REG_CPU_DIV_CLK_CTRL_0_ADDR, reg); in ddr3_dfs_low_2_high()
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| A D | ddr3_axp.h | 350 #define REG_CPU_DIV_CLK_CTRL_0_ADDR 0x18700 macro
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