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Searched refs:REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_dfs.c288 reg |= (freq_par << REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS); in ddr3_dfs_high_2_low()
582 reg |= (freq_par << REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS); in ddr3_dfs_high_2_low()
888 reg |= (freq_par << REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS); in ddr3_dfs_low_2_high()
1300 reg |= (freq_par << REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS); in ddr3_dfs_low_2_high()
A Dddr3_axp.h357 #define REG_CPU_DIV_CLK_CTRL_3_FREQ_OFFS 8 macro

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