Searched refs:REG_DRAM_TRAINING_ADDR (Results 1 – 7 of 7) sorted by relevance
| /u-boot/drivers/ddr/marvell/axp/ |
| A D | ddr3_hw_training.c | 634 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_load_patterns()
676 reg_write(REG_DRAM_TRAINING_ADDR, reg); in ddr3_load_patterns()
681 if (reg_read(REG_DRAM_TRAINING_ADDR) & in ddr3_load_patterns()
925 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_training_suspend_resume()
929 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_training_suspend_resume()
941 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_training_suspend_resume()
944 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_training_suspend_resume()
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| A D | ddr3_sdram.c | 641 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_reset_phy_read_fifo()
646 reg_write(REG_DRAM_TRAINING_ADDR, reg); in ddr3_reset_phy_read_fifo()
661 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_reset_phy_read_fifo()
667 reg_write(REG_DRAM_TRAINING_ADDR, reg); in ddr3_reset_phy_read_fifo()
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| A D | ddr3_write_leveling.c | 89 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_write_leveling_hw()
101 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_write_leveling_hw()
228 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_wl_supplement()
512 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_write_leveling_hw_reg_dimm()
524 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_write_leveling_hw_reg_dimm()
634 reg_write(REG_DRAM_TRAINING_ADDR, 0); in ddr3_write_leveling_hw_reg_dimm()
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| A D | ddr3_pbs.c | 117 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_pbs_tx()
560 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_pbs_rx()
674 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_pbs_rx()
678 reg_write(REG_DRAM_TRAINING_ADDR, reg); in ddr3_pbs_rx()
692 reg = reg_read(REG_DRAM_TRAINING_ADDR); in ddr3_pbs_rx()
696 reg_write(REG_DRAM_TRAINING_ADDR, reg); in ddr3_pbs_rx()
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| A D | ddr3_axp.h | 209 #define REG_DRAM_TRAINING_ADDR 0x15B0 macro
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| A D | ddr3_read_leveling.c | 77 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_read_leveling_hw()
199 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_read_leveling_sw()
315 reg_write(REG_DRAM_TRAINING_ADDR, 0); /* 0x15B0 - Training Register */ in ddr3_read_leveling_sw()
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| A D | ddr3_dqs.c | 148 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_dqs_centralization_rx()
230 reg_write(REG_DRAM_TRAINING_ADDR, reg); /* 0x15B0 - Training Register */ in ddr3_dqs_centralization_tx()
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