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Searched refs:REG_PHY_LOCK_STATUS_LOCK_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_dfs.c661 REG_PHY_LOCK_STATUS_LOCK_MASK; in ddr3_dfs_high_2_low()
662 } while (reg != REG_PHY_LOCK_STATUS_LOCK_MASK); /* Wait for '0xFFF' */ in ddr3_dfs_high_2_low()
1393 REG_PHY_LOCK_STATUS_LOCK_MASK; in ddr3_dfs_low_2_high()
1394 } while (reg != REG_PHY_LOCK_STATUS_LOCK_MASK); in ddr3_dfs_low_2_high()
A Dddr3_axp.h300 #define REG_PHY_LOCK_STATUS_LOCK_MASK 0xFFF macro

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