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Searched refs:REG_SAMPLE_RESET_HIGH_ADDR (Results 1 – 4 of 4) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_init.c379 soc_num = (reg_read(REG_SAMPLE_RESET_HIGH_ADDR) & SAR1_CPU_CORE_MASK) >> in ddr3_init_main()
696 reg = reg_read(REG_SAMPLE_RESET_HIGH_ADDR); /* 0xE8200 */ in ddr3_get_cpu_freq()
705 reg = reg_read(REG_SAMPLE_RESET_HIGH_ADDR); /* 0x18234 [20] */ in ddr3_get_cpu_freq()
736 reg = reg_read(REG_SAMPLE_RESET_HIGH_ADDR); in ddr3_get_fab_opt()
A Dddr3_axp.h63 #define REG_SAMPLE_RESET_HIGH_ADDR 0x18234 macro
/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_plat.h84 #define REG_SAMPLE_RESET_HIGH_ADDR 0x18600 macro
A Dmv_ddr_plat.c1215 soc_num = (reg_read(REG_SAMPLE_RESET_HIGH_ADDR) & SAR1_CPU_CORE_MASK) >> in mv_ddr_pre_training_soc_config()

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