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Searched refs:REG_TRAINING_DEBUG_3_ADDR (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_read_leveling.c660 add = reg_read(REG_TRAINING_DEBUG_3_ADDR); in ddr3_read_leveling_single_cs_rl_mode()
718 add = reg_read(REG_TRAINING_DEBUG_3_ADDR); in ddr3_read_leveling_single_cs_rl_mode()
1064 add = reg_read(REG_TRAINING_DEBUG_3_ADDR); in ddr3_read_leveling_single_cs_window_mode()
1191 add = reg_read(REG_TRAINING_DEBUG_3_ADDR); in ddr3_read_leveling_single_cs_window_mode()
A Dddr3_axp.h246 #define REG_TRAINING_DEBUG_3_ADDR 0x15C8 macro
A Dddr3_init.c510 reg = reg_read(REG_TRAINING_DEBUG_3_ADDR); in ddr3_init_main()
521 reg_write(REG_TRAINING_DEBUG_3_ADDR, reg); in ddr3_init_main()

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