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Searched refs:RGCTL_DDR_PAD_CMD_G1_REG (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/mips/mach-mtmips/mt7628/
A Dmt7628.h92 #define RGCTL_DDR_PAD_CMD_G1_REG 0x70c macro
A Dddr.c95 cmd_pad1 = readl(rgc + RGCTL_DDR_PAD_CMD_G1_REG); in mt7628_ddr_pad_ldo_config()
124 writel(cmd_pad1, rgc + RGCTL_DDR_PAD_CMD_G1_REG); in mt7628_ddr_pad_ldo_config()

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