Searched refs:RSTMGR_DEFINE (Results 1 – 4 of 4) sorted by relevance
| /u-boot/arch/arm/mach-socfpga/include/mach/ |
| A D | reset_manager_gen5.h | 32 #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0)
33 #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1)
34 #define RSTMGR_NAND RSTMGR_DEFINE(1, 4)
35 #define RSTMGR_QSPI RSTMGR_DEFINE(1, 5)
36 #define RSTMGR_L4WD0 RSTMGR_DEFINE(1, 6)
38 #define RSTMGR_UART0 RSTMGR_DEFINE(1, 16)
39 #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 18)
40 #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 19)
41 #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 22)
42 #define RSTMGR_DMA RSTMGR_DEFINE(1, 28)
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| A D | reset_manager_arria10.h | 36 #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0)
37 #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1)
38 #define RSTMGR_EMAC2 RSTMGR_DEFINE(1, 2)
39 #define RSTMGR_NAND RSTMGR_DEFINE(1, 5)
40 #define RSTMGR_QSPI RSTMGR_DEFINE(1, 6)
41 #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 7)
42 #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
43 #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
44 #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
45 #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
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| A D | reset_manager_soc64.h | 42 #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
43 #define RSTMGR_OSC1TIMER0 RSTMGR_DEFINE(2, 4)
44 #define RSTMGR_UART0 RSTMGR_DEFINE(2, 16)
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| A D | reset_manager.h | 28 #define RSTMGR_DEFINE(_bank, _offset) \ macro
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