Searched refs:RST_BUS_SPI0 (Results 1 – 23 of 23) sorted by relevance
| /u-boot/include/dt-bindings/reset/ |
| A D | sun8i-v3s-ccu.h | 61 #define RST_BUS_SPI0 15 macro
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| A D | sun8i-a23-a33-ccu.h | 59 #define RST_BUS_SPI0 13 macro
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| A D | sun8i-a83t-ccu.h | 63 #define RST_BUS_SPI0 15 macro
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| A D | sun9i-a80-ccu.h | 56 #define RST_BUS_SPI0 10 macro
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| A D | sun50i-a64-ccu.h | 62 #define RST_BUS_SPI0 16 macro
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| A D | sun8i-h3-ccu.h | 63 #define RST_BUS_SPI0 15 macro
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| A D | sun50i-h616-ccu.h | 37 #define RST_BUS_SPI0 28 macro
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| A D | sun50i-h6-ccu.h | 40 #define RST_BUS_SPI0 31 macro
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| A D | sun8i-r40-ccu.h | 65 #define RST_BUS_SPI0 17 macro
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| /u-boot/drivers/clk/sunxi/ |
| A D | clk_v3s.c | 38 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| A D | clk_a23.c | 50 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| A D | clk_a64.c | 55 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| A D | clk_a80.c | 38 [RST_BUS_SPI0] = RESET(0x5a0, BIT(20)),
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| A D | clk_a83t.c | 53 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| A D | clk_h6.c | 59 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
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| A D | clk_h3.c | 63 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| A D | clk_h616.c | 71 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
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| A D | clk_r40.c | 66 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)),
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| /u-boot/arch/arm/dts/ |
| A D | sun8i-v3s.dtsi | 521 resets = <&ccu RST_BUS_SPI0>;
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| A D | sun50i-h616.dtsi | 435 resets = <&ccu RST_BUS_SPI0>;
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| A D | sun50i-h6.dtsi | 571 resets = <&ccu RST_BUS_SPI0>;
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| A D | sunxi-h3-h5.dtsi | 577 resets = <&ccu RST_BUS_SPI0>;
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| A D | sun50i-a64.dtsi | 987 resets = <&ccu RST_BUS_SPI0>;
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