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Searched refs:RST_BUS_SPI1 (Results 1 – 20 of 20) sorted by relevance

/u-boot/include/dt-bindings/reset/
A Dsun8i-a23-a33-ccu.h60 #define RST_BUS_SPI1 14 macro
A Dsun8i-a83t-ccu.h64 #define RST_BUS_SPI1 16 macro
A Dsun9i-a80-ccu.h57 #define RST_BUS_SPI1 11 macro
A Dsun50i-a64-ccu.h63 #define RST_BUS_SPI1 17 macro
A Dsun8i-h3-ccu.h64 #define RST_BUS_SPI1 16 macro
A Dsun50i-h616-ccu.h38 #define RST_BUS_SPI1 29 macro
A Dsun50i-h6-ccu.h41 #define RST_BUS_SPI1 32 macro
A Dsun8i-r40-ccu.h66 #define RST_BUS_SPI1 18 macro
/u-boot/drivers/clk/sunxi/
A Dclk_a23.c51 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
A Dclk_a64.c56 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
A Dclk_a80.c39 [RST_BUS_SPI1] = RESET(0x5a0, BIT(21)),
A Dclk_a83t.c54 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
A Dclk_h6.c60 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
A Dclk_h3.c64 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
A Dclk_h616.c72 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
A Dclk_r40.c67 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)),
/u-boot/arch/arm/dts/
A Dsun50i-h616.dtsi450 resets = <&ccu RST_BUS_SPI1>;
A Dsun50i-h6.dtsi586 resets = <&ccu RST_BUS_SPI1>;
A Dsunxi-h3-h5.dtsi593 resets = <&ccu RST_BUS_SPI1>;
A Dsun50i-a64.dtsi1004 resets = <&ccu RST_BUS_SPI1>;

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