RW_MGR_ACTIVATE_0_AND_1_WAIT2 (reference) in projects: u-boot

Searched refs:RW_MGR_ACTIVATE_0_AND_1_WAIT2 (Results 1 – 14 of 14) sorted by relevance

/u-boot/board/altera/arria5-socdk/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/altera/cyclone5-socdk/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/aries/mcvevk/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/is1/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/keymile/secu1/qts/
A D	sdram_config.h	`85 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x14 macro`
/u-boot/board/softing/vining_fpga/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/sr1500/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/devboards/dbm-soc1/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/ebv/socrates/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/terasic/de10-nano/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/terasic/de0-nano-soc/qts/
A D	sdram_config.h	`86 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/terasic/de1-soc/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/board/terasic/sockit/qts/
A D	sdram_config.h	`84 #define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x10 macro`
/u-boot/arch/arm/mach-socfpga/
A D	wrap_sdram_config.c	`194 .activate_0_and_1_wait2 = RW_MGR_ACTIVATE_0_AND_1_WAIT2,`

Completed in 21 milliseconds