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Searched refs:RX (Results 1 – 25 of 49) sorted by relevance

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/u-boot/doc/device-tree-bindings/net/
A Dmicrel-ksz90x1.txt47 - rxdv-skew-ps : Skew control of RX CTL pad
50 - rxd0-skew-ps : Skew control of RX data 0 pad
51 - rxd1-skew-ps : Skew control of RX data 1 pad
52 - rxd2-skew-ps : Skew control of RX data 2 pad
53 - rxd3-skew-ps : Skew control of RX data 3 pad
134 - rxc-skew-ps : Skew control of RX clock pad
139 - rxdv-skew-ps : Skew control of RX CTL pad
141 - rxd0-skew-ps : Skew control of RX data 0 pad
142 - rxd1-skew-ps : Skew control of RX data 1 pad
143 - rxd2-skew-ps : Skew control of RX data 2 pad
[all …]
A Dethernet.txt29 * "rgmii" (RX and TX delays are added by the MAC when required)
30 * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
31 MAC should not add the RX or TX delays in this case)
32 * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
33 should not add an RX delay in this case)
A Dsnps,dwc-qos-ethernet.txt32 PHY's RX clock output. In other configurations, other clocks (such as
33 rx_125, rmii) may drive the EQOS RX path.
61 extend the binding with a separate clock-names entry for each of those RX
66 specific RX clocks.
117 - snps,rxpbl: DMA Programmable burst length for the RX DMA
/u-boot/arch/arm/dts/
A Dmeson-gxbb-nanopi-k2.dts197 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
208 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
209 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
210 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
246 "Bluetooth UART TX", "Bluetooth UART RX",
A Dsama5d3_can.dtsi20 …<AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1…
28 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
A Dmeson-gxbb-odroidc2.dts255 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
266 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
267 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
268 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
A Dkirkwood-blackarmor-nas220.dts98 * pin 4 - RX (CPU's RX)
A Dstm32mp15xx-dhcom-drc02.dts34 * GPIO line, however the STM32 UART driver assumes RX happens
36 * line. Hence, the RX is always enabled here.
A Dmeson-gxl-s905x-khadas-vim.dts116 "UART RX",
162 "Bluetooth UART TX", "Bluetooth UART RX",
A Domap3.dtsi493 <60>; /* RX interrupt */
512 <63>, /* RX interrupt */
532 <90>, /* RX interrupt */
551 <55>; /* RX interrupt */
570 <82>; /* RX interrupt */
A Darmada-8040-puzzle-m801.dts76 * AP UART 1 RX/TX [7-8]
98 * [40,41] CP0 UART1 TX/RX
A Dsun8i-a23-evb.dts123 * The RX line has a non-populated resistance. In order to use it, you
A Ddra7-evm-common.dtsi233 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
A Dam335x-wega.dtsi63 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
/u-boot/arch/arm/mach-mediatek/
A DKconfig33 I2S, PCM, S/PDIF, UART, SPI, I2C, IR TX/RX, and PWM.
52 IR RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth digital
61 Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo
70 Ethernet, IR TX/RX, I2C, I2S, S/PDIF, and built-in Wi-Fi / Bluetooth combo
/u-boot/drivers/net/
A Dfsl_enetc.c496 ENETC_BDR(RX, ENETC_RX_BDR_ID, ENETC_RBCIR); in enetc_setup_rx_bdr()
498 ENETC_BDR(RX, ENETC_RX_BDR_ID, ENETC_RBPIR); in enetc_setup_rx_bdr()
501 enetc_bdr_write(priv, RX, ENETC_RX_BDR_ID, ENETC_RBBAR0, in enetc_setup_rx_bdr()
503 enetc_bdr_write(priv, RX, ENETC_RX_BDR_ID, ENETC_RBBAR1, in enetc_setup_rx_bdr()
506 enetc_bdr_write(priv, RX, ENETC_RX_BDR_ID, ENETC_RBLENR, in enetc_setup_rx_bdr()
509 enetc_bdr_write(priv, RX, ENETC_RX_BDR_ID, ENETC_RBBSR, PKTSIZE_ALIGN); in enetc_setup_rx_bdr()
525 enetc_bdr_write(priv, RX, ENETC_RX_BDR_ID, ENETC_RBMR, ENETC_RBMR_EN); in enetc_setup_rx_bdr()
A Dfsl_enetc.h32 enum enetc_bdr_type {TX, RX}; enumerator
A Dmacb.c290 #define RX 1 macro
412 macb_invalidate_ring_desc(macb, RX); in reclaim_rx_buffers()
434 macb_flush_ring_desc(macb, RX); in reclaim_rx_buffers()
448 macb_invalidate_ring_desc(macb, RX); in _macb_recv()
905 macb_flush_ring_desc(macb, RX); in _macb_init()
/u-boot/doc/device-tree-bindings/mailbox/
A Dk3-secure-proxy.txt35 # RX thread ID is 4.
/u-boot/configs/
A Dnokia_rx51_defconfig18 CONFIG_SYS_PROMPT="Nokia RX-51 # "
/u-boot/doc/device-tree-bindings/firmware/
A Dnvidia,tegra186-bpmp.txt17 - shmem : List of the phandle of the TX and RX shared memory area that
62 The shared memory area for the IPC TX and RX between CPU and BPMP are
/u-boot/board/ste/stemmy/
A DREADME47 With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-.
/u-boot/doc/
A DREADME.nokia_rx511 Board: Nokia RX-51 aka N900
88 flashed with attached zImage to RX-51 kernel nand area. For enabling UBIFS
/u-boot/doc/device-tree-bindings/soc/fsl/cpm_qe/qe/
A Ducc.txt31 Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
/u-boot/drivers/usb/musb/
A Dmusb_udc.c92 RX, enumerator
347 SET_EP0_STATE(RX); in musb_peri_ep0_rx_data_request()
627 if (RX == ep0_state) in musb_peri_ep0()

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