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Searched refs:SCG_APLL_PFD1_CLK (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7ulp/
A Dclock.c309 scg_enable_pll_pfd(SCG_APLL_PFD1_CLK, 35); in clock_init()
A Dscg.c180 case SCG_APLL_PFD1_CLK: in scg_apll_pfd_get_rate()
600 case SCG_APLL_PFD1_CLK: in scg_clk_get_rate()
654 case SCG_APLL_PFD1_CLK: in scg_enable_pll_pfd()
A Dpcc.c23 SCG_APLL_PFD1_CLK,
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h226 SCG_APLL_PFD1_CLK, enumerator

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