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Searched refs:SCG_DDRCCR_DDRDIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h32 #define SCG_DDRCCR_DDRDIV_SHIFT (0) macro
33 #define SCG_DDRCCR_DDRDIV_MASK ((0x7UL) << SCG_DDRCCR_DDRDIV_SHIFT)
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c337 div = (reg & SCG_DDRCCR_DDRDIV_MASK) >> SCG_DDRCCR_DDRDIV_SHIFT; in scg_ddr_get_rate()
924 #define SCG1_DDRCCR_DDRDIV_NUM ((0x1) << SCG_DDRCCR_DDRDIV_SHIFT)
926 #define SCG1_DDRCCR_DDRDIV_LF_NUM ((0x2) << SCG_DDRCCR_DDRDIV_SHIFT)

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