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Searched refs:SCG_FIRCDIV_DIV1_SHIFT (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h111 #define SCG_FIRCDIV_DIV1_SHIFT (0) macro
112 #define SCG_FIRCDIV_DIV1_MASK ((0x7UL) << SCG_FIRCDIV_DIV1_SHIFT)
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c100 shift = SCG_FIRCDIV_DIV1_SHIFT; in scg_fircdiv_get_rate()
960 #define SCG1_FIRCDIV_DIV1_NUM ((0x0) << SCG_FIRCDIV_DIV1_SHIFT)

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