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Searched refs:SCG_PLL_PFD0_VALID_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c176 valid = SCG_PLL_PFD0_VALID_MASK; in scg_apll_pfd_get_rate()
226 valid = SCG_PLL_PFD0_VALID_MASK; in scg_spll_pfd_get_rate()
644 valid = SCG_PLL_PFD0_VALID_MASK; in scg_enable_pll_pfd()
915 while (!(readl(&scg1_regs->spllpfd) & SCG_PLL_PFD0_VALID_MASK)) in scg_a7_spll_init()
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h156 #define SCG_PLL_PFD0_VALID_MASK (0x00000040) macro

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