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Searched refs:SCLK (Results 1 – 6 of 6) sorted by relevance

/u-boot/board/renesas/stout/
A Dcpld.c17 #define SCLK (92 + 24) macro
36 gpio_set_value(SCLK, 1); in cpld_read()
38 gpio_set_value(SCLK, 0); in cpld_read()
43 gpio_set_value(SCLK, 1); in cpld_read()
44 gpio_set_value(SCLK, 0); in cpld_read()
48 gpio_set_value(SCLK, 1); in cpld_read()
51 gpio_set_value(SCLK, 0); in cpld_read()
63 gpio_set_value(SCLK, 1); in cpld_write()
65 gpio_set_value(SCLK, 0); in cpld_write()
77 gpio_set_value(SCLK, 1); in cpld_write()
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/u-boot/drivers/rtc/
A Dds1302.c15 #define SCLK 0x400 macro
19 #define RESET rtc_go_low(RST), rtc_go_low(SCLK)
20 #define N_RESET rtc_go_high(RST), rtc_go_low(SCLK)
22 #define CLOCK_HIGH rtc_go_high(SCLK)
23 #define CLOCK_LOW rtc_go_low(SCLK)
199 rtc_go_output(DATA|SCLK|RST); in rtc_init()
/u-boot/include/
A Dsym53c8xx.h187 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
/u-boot/arch/arm/dts/
A Darmada-385-turris-omnia.dts377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/u-boot/drivers/video/
A DKconfig491 string "SPI SCLK pin for LCD related config job"
/u-boot/
A DREADME1700 the i2c SCLK line directly, either by using the

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