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Searched refs:SCLK_UART2 (Results 1 – 25 of 27) sorted by relevance

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/u-boot/include/dt-bindings/clock/
A Drk3036-cru.h25 #define SCLK_UART2 79 macro
A Drk3128-cru.h24 #define SCLK_UART2 79 macro
A Dexynos7420-clk.h100 #define SCLK_UART2 5 macro
A Drk3228-cru.h25 #define SCLK_UART2 79 macro
A Drk3188-cru-common.h22 #define SCLK_UART2 66 macro
A Drk3288-cru.h31 #define SCLK_UART2 79 macro
A Drk3368-cru.h41 #define SCLK_UART2 79 macro
A Drv1108-cru.h24 #define SCLK_UART2 74 macro
A Dpx30-cru.h31 #define SCLK_UART2 25 macro
A Drk3308-cru.h23 #define SCLK_UART2 19 macro
A Drk3328-cru.h29 #define SCLK_UART2 40 macro
A Drk3399-cru.h39 #define SCLK_UART2 83 macro
/u-boot/arch/arm/dts/
A Dexynos7420.dtsi77 <&clock_peric1 SCLK_UART2>;
A Drk3036.dtsi143 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk3xxx.dtsi366 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drv1108.dtsi88 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk3128.dtsi294 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk322x.dtsi206 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk3328.dtsi376 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
781 <&cru SCLK_UART1>, <&cru SCLK_UART2>,
A Drk3368.dtsi637 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk3288.dtsi355 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
A Drk3308.dtsi279 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
/u-boot/drivers/clk/exynos/
A Dclk-exynos7420.c177 case SCLK_UART2: in exynos7420_peric1_get_rate()
/u-boot/drivers/clk/rockchip/
A Dclk_rk3328.c657 case SCLK_UART2: in rk3328_clk_set_rate()
778 case SCLK_UART2: in rk3328_clk_set_parent()
A Dclk_rk3399.c939 case SCLK_UART2: in rk3399_clk_get_rate()

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