Home
last modified time | relevance | path

Searched refs:SC_CLKCTRL (Results 1 – 12 of 12) sorted by relevance

/u-boot/arch/arm/mach-uniphier/clk/
A Dclk-early-ld4.c18 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_ld4_early_clk_init()
20 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_ld4_early_clk_init()
21 readl(sc_base + SC_CLKCTRL); /* dummy read */ in uniphier_ld4_early_clk_init()
A Dclk-dram-ld4.c24 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_ld4_dram_clk_init()
26 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_ld4_dram_clk_init()
27 readl(sc_base + SC_CLKCTRL); /* dummy read */ in uniphier_ld4_dram_clk_init()
A Dclk-pro5.c28 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pro5_clk_init()
31 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pro5_clk_init()
32 readl(sc_base + SC_CLKCTRL); /* dummy read */ in uniphier_pro5_clk_init()
A Dclk-pro4.c31 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pro4_clk_init()
34 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pro4_clk_init()
35 readl(sc_base + SC_CLKCTRL); /* dummy read */ in uniphier_pro4_clk_init()
A Dclk-pxs2.c33 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pxs2_clk_init()
36 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pxs2_clk_init()
37 readl(sc_base + SC_CLKCTRL); /* dummy read */ in uniphier_pxs2_clk_init()
/u-boot/arch/arm/mach-uniphier/debug-uart/
A Ddebug-uart-ld6b.c25 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_ld6b_debug_uart_init()
27 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_ld6b_debug_uart_init()
A Ddebug-uart-pro4.c25 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pro4_debug_uart_init()
27 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pro4_debug_uart_init()
A Ddebug-uart-pxs2.c26 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pxs2_debug_uart_init()
28 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pxs2_debug_uart_init()
A Ddebug-uart-pro5.c28 tmp = readl(sc_base + SC_CLKCTRL); in uniphier_pro5_debug_uart_init()
30 writel(tmp, sc_base + SC_CLKCTRL); in uniphier_pro5_debug_uart_init()
/u-boot/arch/arm/mach-uniphier/arm32/
A Ddebug_ll.S66 ldr r0, =(SC_BASE + SC_CLKCTRL)
107 ldr r0, =(SC_BASE + SC_CLKCTRL)
132 ldr r0, =(SC_BASE + SC_CLKCTRL)
156 ldr r0, =(SC_BASE + SC_CLKCTRL)
/u-boot/arch/arm/mach-uniphier/
A Dsc64-regs.h26 #define SC_CLKCTRL 0x2100 macro
A Dsc-regs.h72 #define SC_CLKCTRL 0x2104 macro

Completed in 8 milliseconds