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Searched refs:SD1CKCR (Results 1 – 7 of 7) sorted by relevance

/u-boot/board/renesas/alt/
A Dalt.c54 #define SD1CKCR 0xE6150078 macro
63 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
A Dalt_spl.c29 #define SD1CKCR 0xE6150078 macro
368 writel(SD_97500KHZ, SD1CKCR); in board_init_f()
/u-boot/board/renesas/silk/
A Dsilk.c55 #define SD1CKCR 0xE6150078 macro
64 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
A Dsilk_spl.c29 #define SD1CKCR 0xE6150078 macro
382 writel(SD_97500KHZ, SD1CKCR); in board_init_f()
/u-boot/board/renesas/gose/
A Dgose.c57 #define SD1CKCR 0xE6150078 macro
69 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
/u-boot/board/renesas/koelsch/
A Dkoelsch.c59 #define SD1CKCR 0xE6150078 macro
71 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()
/u-boot/board/renesas/lager/
A Dlager.c68 #define SD1CKCR 0xE6150078 macro
80 writel(SD_97500KHZ, SD1CKCR); in board_early_init_f()

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