Searched refs:SPI_CFG1_MBR (Results 1 – 1 of 1) sorted by relevance
55 #define SPI_CFG1_MBR GENMASK(30, 28) macro57 #define SPI_CFG1_MBR_MAX FIELD_GET(SPI_CFG1_MBR, SPI_CFG1_MBR)356 clrsetbits_le32(priv->base + STM32_SPI_CFG1, SPI_CFG1_MBR, in stm32_spi_set_speed()
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