Searched refs:SPRN_L1CFG0 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/powerpc/include/asm/
A D	processor.h	482 #define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */ macro 736 #define L1CFG0 SPRN_L1CFG0
/u-boot/arch/powerpc/cpu/mpc85xx/
A D	fdt.c	392 u32 l1cfg0 = mfspr(SPRN_L1CFG0); in ft_fixup_cache()
A D	start.S	1777 mfspr r3,SPRN_L1CFG0

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