SRDS_PLLCR0_FRATE_SEL_3_75 (reference) in projects: u-boot

Searched refs:SRDS_PLLCR0_FRATE_SEL_3_75 (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
A D	fsl_corenet2_serdes.c	`254 case SRDS_PLLCR0_FRATE_SEL_3_75: in serdes_init()`
/u-boot/arch/arm/include/asm/arch-ls102xa/
A D	immap_ls102xa.h	`334 #define SRDS_PLLCR0_FRATE_SEL_3_75 0x00050000 macro`
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A D	immap_lsch2.h	`585 #define SRDS_PLLCR0_FRATE_SEL_3_75 0x00050000 macro`
/u-boot/arch/powerpc/include/asm/
A D	immap_85xx.h	`2549 #define SRDS_PLLCR0_FRATE_SEL_3_75 0x00050000 macro`

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