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Searched refs:SRDS_PLLCR0_RFCK_SEL_156_25 (Results 1 – 8 of 8) sorted by relevance

/u-boot/board/freescale/corenet_ds/
A Dcorenet_ds.c156 actual[i] = SRDS_PLLCR0_RFCK_SEL_156_25; in misc_init_r()
173 SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125; in misc_init_r()
175 SRDS_PLLCR0_RFCK_SEL_156_25 : SRDS_PLLCR0_RFCK_SEL_125; in misc_init_r()
/u-boot/board/freescale/p2041rdb/
A Dp2041rdb.c175 {SRDS_PLLCR0_RFCK_SEL_100, SRDS_PLLCR0_RFCK_SEL_156_25, in misc_init_r()
/u-boot/arch/powerpc/cpu/mpc85xx/
A Dfsl_corenet_serdes.c393 rfck_sel = SRDS_PLLCR0_RFCK_SEL_156_25; in p4080_erratum_serdes8()
880 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
A Dfsl_corenet2_serdes.c390 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
/u-boot/arch/arm/include/asm/arch-ls102xa/
A Dimmap_ls102xa.h327 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
A Dfsl_lsch2_serdes.c94 case SRDS_PLLCR0_RFCK_SEL_156_25: in serdes_clock_to_string()
/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
A Dimmap_lsch2.h578 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
/u-boot/arch/powerpc/include/asm/
A Dimmap_85xx.h2540 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro
2624 #define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 macro

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