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Searched refs:SSCG_PLL_SSE_MASK (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-imx8m/
A Dclock_imx8mq.h369 #define SSCG_PLL_SSE_MASK 0x1 macro
/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mq.c238 sse = pll_cfg1 & SSCG_PLL_SSE_MASK; in decode_sscg_pll()

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